LoongLeak

LoongLeak is a vulnerability affecting the Loongson 3A5000 and 3A6000 CPUs. LoongLeak allows unprivileged attackers to leak data from the L1 data cache, including data from other processes or the operating system.

Loongson & LoongArch

Loongson is a CPU manufacturer that produces high-performance CPUs primarily targeting the Chinese domestic market, including government and administrative sectors. These CPUs use a custom instruction set called LoongArch™. The latest high-performance Loongson CPUs use the 64-bit variant of LoongArch named LA64.

Caches

Comparison of CPU with and without Cache

Like other modern processors, Loongson processors rely on CPU caches. CPU caches are small but fast memory units that keep a subset of data close to the CPU for faster access. The CPU decides what data is stored in the cache, usually recently accessed data and data following predictable access patterns.

CPU caches do not distinguish between applications. Data from multiple applications and the operating system can be stored in a cache at the same time.

CPU caches store fixed-size chunks of data (usually 64 bytes) called “cache lines”. Most CPU caches are set-associative. This means data is stored in a fixed-size table where the row (“cache set”) is decided by parts of the address and all columns (“cache ways”) of a single row must be checked. To determine if an entry matches, the remaining address bits are stored alongside the data.

The Loongson 3A5000 and 3A6000 CPUs feature one 64KB L1 data cache (256 sets, 4 ways) and one 64KB L1 instruction cache per core, a larger but slower L2 unified cache (used for data and code) per core and an L3 unified cache that is shared by all cores.

LoongArch Vector Extensions

CPUs use fixed-size data containers called “registers” for computations. By default, LA64 supports 32 registers (f0-f31) for floating-point operations which are all 64 bits in size. With the LSX vector extension, these registers are extended to 128 bits (vr0-vr31) and with the LASX vector extension to 256 bits (xr0-xr31).

LSX and LASX extend the base instruction set, meaning instructions that just operate on the lower 64 bits of the register are still supported. Since 32-bit floating-point calculations are also commonly done in software, there are even instructions just operating on the lower 32 bits of the register.

LoongLeak

While we first discovered LoongLeak with a differential fuzzer, there is also a hint in the LoongArch manual. According to the LoongArch manual, the FLD.S instruction, which loads 32 bits from memory and stores it into a floating-point register, leaves the high 32 bits of the register “uncertain”. With LASX, the floating-point registers are extended to 256 bits, leading to 224 bits (28 bytes) of “uncertain” data.

Our analysis reveals that under certain circumstances, the “uncertain” data originates from the L1 data cache. Since this cache is not isolated between applications, LoongLeak can leak data from other applications and the operating system. Even worse, an attacker can prime the CPU’s internal state to target the leakage to a specific cache set.

Demo

We show what LoongLeak can do with two proof-of-concept exploits.

In the first exploit, we use LoongLeak to leak the stack canary of ffmpeg on a Loongson 3A5000 CPU while it is encoding a video. Stack canaries are used as a mitigation for stack-based buffer overflow exploits. For successful exploitation, an attacker must first leak the canary. We modified ffmpeg to print the canary on startup for verification.

The Loongson 3A6000 CPU supports simultaneous multi-threading, meaning a single physical CPU core operates as two logical CPU cores. These logical CPU cores share a single L1 data cache, allowing LoongLeak to leak data from the sibling core. While we are unable to accurately target the leakage when a sibling thread is active, the high throughput of LoongLeak allows leaking useful data.

We demonstrate this by leaking the first 32 bytes of the /etc/shadow entry of root containing the full salt and 9 bytes of the password hash, which is sufficient to mount a dictionary attack. We run the attack on a Loongson 3A6000 CPU and execute passwd -S on the sibling thread to get the shadow file into the L1 data cache.

Overall, the attacker’s capabilities are similar to Meltdown on an unpatched system.

Who found it?

FAQ

Am I affected by this vulnerability?

Most likely, you are not affected directly. Only individuals that use computers with vulnerable Loongson CPUs (3A5000 and 3A6000), cloud deployments, or other multi-party computing solutions are directly affected. The usage of such CPUs is mainly restricted to the Chinese domestic market, including government and administrative sectors.

Can software updates or patches fix this vulnerability?

No, software updates or patches cannot fix this vulnerability because it is a hardware bug. The impact of the vulnerability can be mitigated in software by ensuring no private data is in the L1 data cache. Alternatively, the LSX, LASX, and floating-point extension can be disabled. However, this breaks a significant amount of applications and causes an immense overhead. Thus, we suggest evicting the L1 data cache instead.

How to mitigate LoongLeak? How do I protect devices against this vulnerability?

LoongLeak can be mitigated by evicting the L1 Data Cache on kernel-to-user transitions by filling it with non-sensitive data. For the Loongson 3A6000, one thread per core must additionally be disabled to effectively disable hyperthreading. Loongson fixed this issue in hardware with a new CPU revision of the Loongson 3A6000.

What are the performance impacts of evicting the L1 data cache?

In our measurements, the performance impact of evicting the L1 data cache is low. We measured a maximum slowdown of 1.4%, but for most benchmarks, the slowdown was less than 0.1%. However, disabling half of the logical CPU cores on the Loongson 3A6000 has a significant performance penalty.

What can be leaked using LoongLeak?

LoongLeak can leak data from the L1 data cache including from other applications and the operating system. For the Loongson 3A5000, everything in the cache can be leaked, while for the Loongson 3A6000, we only successfully leaked the second half of a cache line. This still leaves half of the L1 data cache in scope for LoongLeak.

How fast is LoongLeak?

Since LoongLeak only requires loads that hit the L1 data cache and leaks 28 bytes at a time, it is very fast at over 300 MB/s. The limitation is not LoongLeak itself, but how fast the leaked data can be processed and how quickly victim data can be brought into the L1 data cache.

Is this a side-channel or transient-execution attack?

No, LoongLeak is an architectural bug and does not fall into the category of transient-execution attacks like Meltdown or Spectre, since no side channel is required to exfiltrate the data. It is also not a side-channel attack as the data directly manifests in vector registers, which are an architectural component.

What is the official statement of Loongson?

We reported the bug to Loongson. They acknowledged and reproduced it. They further fixed the issue in a new revision of the Loongson 3A6000 processor.

Can LoongLeak be detected or monitored in some way?

As of now, there are no specific tools or methods to detect if LoongLeak is being exploited.

How did you find LoongLeak?

We first discovered LoongLeak using a differential fuzzing approach, which compares instruction execution on hardware with the qemu emulator. To pinpoint the origin of the leakage and how an attacker can influence it, we conducted comprehensive experiments which are outlined in the paper.

Can I use the logo?

The logo is free to use, rights waived via CC0. Logo designed by Lea Mosbach.

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