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    • mocha

      Public
      CHERI-enabled secure enclave that can be integrated as a subsytem on a system on chip.
      SystemVerilog
      183311522Updated Jun 29, 2026Jun 29, 2026
    • opentitan

      Public
      OpenTitan: Open source silicon root of trust
      SystemVerilog
      Apache License 2.0
      1.1k3.5k1.5k397Updated Jun 29, 2026Jun 29, 2026
    • CHERI-RISC-V model written in Sail
      Isabelle
      Other
      25000Updated Jun 28, 2026Jun 28, 2026
    • Sail RISC-V model
      Coq
      Other
      273001Updated Jun 28, 2026Jun 28, 2026
    • u-boot

      Public
      "Das U-Boot" Source Tree
      C
      4.5k100Updated Jun 24, 2026Jun 24, 2026
    • opensbi

      Public
      OpenSBI with CHERI-RISC-V support
      6000Updated Jun 24, 2026Jun 24, 2026
    • busybox

      Public
      Provide a CHERI-enabled busybox port to support minimal Linux userspace builds.
      C
      Other
      4000Updated Jun 24, 2026Jun 24, 2026
    • linux

      Public
      Linux kernel source tree
      C
      Other
      63k101Updated Jun 24, 2026Jun 24, 2026
    • ot-sku

      Public
      OT SKUs
      Starlark
      5012Updated Jun 23, 2026Jun 23, 2026
    • dvsim

      Public
      DVSim is a build and run system written in Python that runs a variety of EDA tool flows
      Python
      Apache License 2.0
      178311Updated Jun 22, 2026Jun 22, 2026
    • Registry of various part number and ID namespaces that lowRISC controls
      Apache License 2.0
      0100Updated Jun 22, 2026Jun 22, 2026
    • qemu

      Public
      Fork of QEMU for development of lowRISC platforms (including OpenTitan)
      C
      Other
      6.9k9126Updated Jun 19, 2026Jun 19, 2026
    • ftditool

      Public
      A C++ implementation for SPI Flash and GPIO leveraging FTDI MPSSE-enabled chips.
      C++
      Other
      1200Updated Jun 18, 2026Jun 18, 2026
    • ibex

      Public
      Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
      SystemVerilog
      Apache License 2.0
      7581.9k20840Updated Jun 11, 2026Jun 11, 2026
    • A simple converter that turns a compile.yml file into a FuseSoC core
      Python
      Apache License 2.0
      1000Updated Jun 11, 2026Jun 11, 2026
    • lowRISC Nix Packages and Environments
      Nix
      MIT License
      12812Updated Jun 3, 2026Jun 3, 2026
    • Software, build flows and examples for the Sonata System
      C++
      Apache License 2.0
      161431Updated Jun 1, 2026Jun 1, 2026
    • RISC-V Functional ISA Simulator
      C
      Other
      1.1k2002Updated May 28, 2026May 28, 2026
    • ariane-ethernet

      Public archive
      open-source Ethenet media access controller for Ariane on Genesys-2
      SystemVerilog
      MIT License
      102120Updated May 19, 2026May 19, 2026
    • Reference OpenTitan Provisioning Infrastructure
      Go
      Apache License 2.0
      1015172Updated May 18, 2026May 18, 2026
    • Assembly
      Other
      11000Updated May 11, 2026May 11, 2026
    • Easily build and run CHERI related projects
      Python
      Other
      58000Updated Apr 29, 2026Apr 29, 2026
    • lowRISC Style Guides
      Creative Commons Attribution 4.0 International
      133514193Updated Apr 21, 2026Apr 21, 2026
    • binutils

      Public
      (Unsupported) lowRISC fork of Binutils
      C
      GNU General Public License v2.0
      2001Updated Apr 20, 2026Apr 20, 2026
    • A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI
      C++
      Apache License 2.0
      36541110Updated Apr 14, 2026Apr 14, 2026
    • Reuseable Github Actions for CI workflows in lowRISC projects.
      MIT License
      0000Updated Apr 14, 2026Apr 14, 2026
    • sail

      Public
      Sail architecture definition language
      Isabelle
      Other
      158000Updated Feb 27, 2026Feb 27, 2026
    • UNSUPPORTED INTERNAL toolchain builds
      Shell
      224830Updated Feb 24, 2026Feb 24, 2026
    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      SystemVerilog
      Other
      838100Updated Feb 6, 2026Feb 6, 2026
    • A demo system for Ibex including debug support and some peripherals
      C
      Apache License 2.0
      8097137Updated Jan 21, 2026Jan 21, 2026
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